Notes:

1. Circuit ground is connected to chassis ground

2. PHY disabled on TDIS > 2.0V or open, enabled on TDIS < 0.8V

3. Should be pulled up with 4.7k – 10k Ohms on host board to a voltage between 2.0 V and 3.6 V. MOD_DEF(0) pulls line low to indicate module is plugged in.

4. LVTTL compatible with a maximum voltage of 2.5V.

Not supported on 10/100/1000BASE-T.

+3.3V Volt Electrical Power Interface

The SFP-1000BASE-T/SFP-1000BASE-T-SGMII has an input voltage range of 3.3 V +/- 5%. The 4V maximum voltage is not allowed for continuous operation.

Low-Speed Signals

MOD_DEF(1) (SCL) and MOD_DEF(2) (SDA), are open drain CMOS signals (see section VII,

“Serial Communication Protocol”).  Both MOD_DEF(1) and MOD_DEF(2) must be pulled up to host_Vcc.

Low-Speed Signals

MOD_DEF(1) (SCL) and MOD_DEF(2) (SDA), are open drain CMOS signals (see section VII,

“Serial Communication Protocol”).  Both MOD_DEF(1) and MOD_DEF(2) must be pulled up to host_Vcc.